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Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2

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Date

2008

Authors

Yang, Rui
Antony, Joseph
Janes, Pete
Rendell, Alistair

Journal Title

Journal ISSN

Volume Title

Publisher

Institute of Electrical and Electronics Engineers (IEEE Inc)

Abstract

In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 Ml, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.

Description

Keywords

Keywords: Chemistry; Codes (standards); Codes (symbols); Decoding; Parallel processing systems; Trellis codes; Cache blocking; Computational chemistry; Gaussian; International symposium; Multi cores; Parallel architectures; Shared-memory parallel; Parallel algorith

Citation

URI

http://hdl.handle.net/1885/38877

Collections

ANU Research Publications

Source

Proceedings of the 9th International Symposium on Parallel Architectures, Algorithms and Networks

Type

Conference paper

Book Title

Entity type

Access Statement

License Rights

DOI

10.1109/I-SPAN.2008.13

Restricted until

2037-12-31

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01_Yang_Memory_and_Thread_Placement_2008.pdf (279.01 KB)

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