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WADE: Writeback-Aware Dynamic CachE management for NVM-based main memory system

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Date

2013

Authors

Wang, Zhe
Shan, Shuchang
Cao, Ting
Gu, Junli
Xu, Yi
Mu, Shuai
Xie, Yuan
Jimenez, Daniel A

Journal Title

Journal ISSN

Volume Title

Publisher

Association for Computing Machinery, Inc

Abstract

Emerging Non-Volatile Memory (NVM) technologies are explored as potential alternatives to traditional SRAM/DRAM-based memory architecture in future microprocessor design. One of the major disadvantages for NVM is the latency and energy overhead associated

Description

Keywords

Citation

URI

http://hdl.handle.net/1885/64406

Collections

ANU Research Publications

Source

ACM Transactions on Architecture and Code Optimization

Type

Journal article

Book Title

Entity type

Access Statement

License Rights

DOI

10.1145/2555289.2555307

Restricted until

2037-12-31

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01_Wang_WADE:_Writeback-Aware_Dynamic_2013.pdf (2.5 MB)

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