An Optimal Asynchronous IDMA Receiver
| dc.contributor.author | Senanayake, Bathiya | |
| dc.contributor.author | Reed, Mark | |
| dc.contributor.author | Shi, Zhenning | |
| dc.coverage.spatial | Sydney Australia | |
| dc.date.accessioned | 2015-12-10T22:18:50Z | |
| dc.date.available | 2015-12-10T22:18:50Z | |
| dc.date.created | Feburary 4-7 2009 | |
| dc.date.issued | 2009 | |
| dc.date.updated | 2016-02-24T10:59:18Z | |
| dc.description.abstract | In this paper we develop an optimal receiver for an asynchronous IDMA system. A super-block structure is used to formulate the band diagonal matrix model for asynchronous IDMA. We show that the cost function for the ML decoder can be viewed as a path metric through a structured trellis. We use a dynamic programming algorithm to find the maximum likelihood transmitted bit sequence. We compare the performance of the optimal receiver with the conventional iterative receiver. Our results show that the optimal asynchronous IDMA receiver outperforms the iterative IDMA receiver for the IDMA systems with small block sizes that we simulated. | |
| dc.identifier.isbn | 9781424433575 | |
| dc.identifier.uri | http://hdl.handle.net/1885/51582 | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE Inc) | |
| dc.relation.ispartofseries | Australian Communications Theory Workshop (AusCTW 2009) | |
| dc.source | Proceedings of the Australian Communications Theory Workshop (AusCTW 2009) | |
| dc.subject | Keywords: Block sizes; Block structures; Diagonal matrices; Dynamic programming algorithm; Iterative receivers; ML decoder; Optimal receiver; Path metric; Maximum likelihood; Optimization; Systems engineering; Dynamic programming | |
| dc.title | An Optimal Asynchronous IDMA Receiver | |
| dc.type | Conference paper | |
| local.bibliographicCitation.lastpage | 32 | |
| local.bibliographicCitation.startpage | 28 | |
| local.contributor.affiliation | Senanayake, Bathiya, College of Engineering and Computer Science, ANU | |
| local.contributor.affiliation | Reed, Mark, College of Engineering and Computer Science, ANU | |
| local.contributor.affiliation | Shi, Zhenning, College of Engineering and Computer Science, ANU | |
| local.contributor.authoruid | Senanayake, Bathiya, u3957406 | |
| local.contributor.authoruid | Reed, Mark, u3744240 | |
| local.contributor.authoruid | Shi, Zhenning, u1810872 | |
| local.description.notes | Imported from ARIES | |
| local.description.refereed | Yes | |
| local.identifier.absfor | 090609 - Signal Processing | |
| local.identifier.ariespublication | u4334215xPUB227 | |
| local.identifier.doi | 10.1109/AUSCTW.2009.4805595 | |
| local.identifier.scopusID | 2-s2.0-66249089871 | |
| local.type.status | Published Version |