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Minority carrier lifetime in plasma-textured silicon wafers for solar cells

dc.contributor.authorKumaravelu, G
dc.contributor.authorAlkaisi, M M
dc.contributor.authorMacDonald, Daniel
dc.contributor.authorZhao, J
dc.contributor.authorRong, B
dc.contributor.authorBittar, A
dc.date.accessioned2015-12-13T22:51:55Z
dc.date.issued2005
dc.date.updated2015-12-11T10:47:50Z
dc.description.abstractIn this work a comparison between plasma-induced defects by two different SF6 texturing techniques, reactive ion etching (RIE) and high-density plasma (HDP) is presented. It is found that without any defect-removal etching (DRE), the minority carrier lifetime is the highest for the HDP technique. After DRE, the minority carrier lifetime rises as high as 750 μs for both RIE- and HDP-textured wafers at an excess carrier density of 1×1015 cm-3. The measured lifetimes correspond to an implied one-sun open-circuit voltage of around 680 mV compared to about 640 mV before DRE for the HDP-textured wafers. FZ silicon 〈1 0 0〉 wafers were used in this study. We also noted that in the RIE process, the induced defect density was significantly lower for wafers etched at 300 K than those etched at 173 K.
dc.identifier.issn0927-0248
dc.identifier.urihttp://hdl.handle.net/1885/81307
dc.publisherElsevier
dc.sourceSolar Energy Materials and Solar Cells
dc.subjectKeywords: Carrier concentration; Defects; Electric potential; Reactive ion etching; Silicon wafers; Textures; Defect-removal etching (DRE); Minority carrier lifetime; Open-circuit voltages; Surface texturing; Silicon solar cells Minority carrier lifetime; Reactive ion etching; Silicon solar cell; Surface texturing
dc.titleMinority carrier lifetime in plasma-textured silicon wafers for solar cells
dc.typeJournal article
local.bibliographicCitation.issue1-4
local.bibliographicCitation.lastpage106
local.bibliographicCitation.startpage99
local.contributor.affiliationKumaravelu, G, University of Canterbury
local.contributor.affiliationAlkaisi, M M, University of Canterbury
local.contributor.affiliationMacDonald, Daniel, College of Engineering and Computer Science, ANU
local.contributor.affiliationZhao, J, University of New South Wales
local.contributor.affiliationRong, B, Delft University of Technology
local.contributor.affiliationBittar, A, University of New South Wales
local.contributor.authoruidMacDonald, Daniel, u9718154
local.description.embargo2037-12-31
local.description.notesImported from ARIES
local.description.refereedYes
local.identifier.absfor090699 - Electrical and Electronic Engineering not elsewhere classified
local.identifier.ariespublicationMigratedxPub9628
local.identifier.citationvolume87
local.identifier.doi10.1016/j.solmat.2004.07.015
local.identifier.scopusID2-s2.0-17644404399
local.type.statusPublished Version

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