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Efficient Histogram Algorithms for NVIDIA CUDA Compatible Devices

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dc.contributor.authorShams, Ramtin
dc.contributor.authorKennedy, Rodney
dc.coverage.spatialGold Coast Australia
dc.date.accessioned2015-12-07T22:44:13Z
dc.date.createdDecember 17-19 2007
dc.date.issued2007
dc.date.updated2015-12-07T11:22:10Z
dc.identifier.isbn9780975693438
dc.identifier.urihttp://hdl.handle.net/1885/25099
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE Inc)
dc.relation.ispartofseriesInternational Conference on Signal Processing and Communication Systems (ICSPCS 2007)
dc.sourceProceedings of the 1st International Conference on Signal Processing and Communication Systems (ICSPCS 2007)
dc.source.urihttp://www.dspcs-witsp.com/icspcs_2007/Proceedings_ICSPCS2007.pdf
dc.titleEfficient Histogram Algorithms for NVIDIA CUDA Compatible Devices
dc.typeConference paper
local.bibliographicCitation.startpage5
local.contributor.affiliationShams, Ramtin, College of Engineering and Computer Science, ANU
local.contributor.affiliationKennedy, Rodney, College of Engineering and Computer Science, ANU
local.contributor.authoruidShams, Ramtin, u4374676
local.contributor.authoruidKennedy, Rodney, u8607590
local.description.embargo2037-12-31
local.description.notesImported from ARIES
local.description.refereedYes
local.identifier.absfor090609 - Signal Processing
local.identifier.ariespublicationu4334215xPUB36
local.type.statusPublished Version

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