Runtime Verification for LTL and TLTL




Bauer, Andreas
Leucker, Martin
Schallhart, Christian

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ASME Digital Library


This article studies runtime verification of properties expressed either in lineartime temporal logic (LTL) or timed lineartime temporal logic (TLTL). It classifies runtime verification in identifying its distinguishing features to model checking and testing, respectively. It introduces a three-valued semantics (with truth values true, false, inconclusive) as an adequate interpretation as to whether a partial observation of a running system meets an LTL or TLTL property. For LTL, a conceptually simple monitor generation procedure is given, which is optimal in two respects: First, the size of the generated deterministic monitor is minimal, and, second, the monitor identifies a continuously monitored trace as either satisfying or falsifying a property as early as possible. The feasibility of the developed methodology is demontrated using a collection of real-world temporal logic specifications. Moreover, the presented approach is related to the properties monitorable in general and is compared to existing concepts in the literature. It is shown that the set of monitorable properties does not only encompass the safety and cosafety properties but is strictly larger. For TLTL, the same road map is followed by first defining a three-valued semantics. The corresponding construction of a timed monitor is more involved, yet, as shown, possible.



Keywords: Assertion checkers; Linear time temporal logic; Partial observation; Road-maps; Running systems; Runtime verification; Temporal logic specifications; Three-valued; Truth values; Display devices; Model checking; Semantics; Temporal logic Assertion checkers; Monitors; Runtime verification



ACM Transactions on Software Engineering and Methodology


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