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Taper-free and Vertically Oriented Ge Nanowires on Ge/Si Substrates Grown by a Two-Temperature Process

dc.contributor.authorKim, Jung Hyuk
dc.contributor.authorMoon, So Ra
dc.contributor.authorYoon, Hyun Sik
dc.contributor.authorJung, Jae Hun
dc.contributor.authorKim, Yong
dc.contributor.authorChen, Zhi Gang
dc.contributor.authorZou, Jin
dc.contributor.authorJoyce, Hannah J
dc.contributor.authorGao, Qiang
dc.contributor.authorJagadish, Chennupati
dc.contributor.authorTan, Hark Hoe
dc.contributor.authorChoi, Duk-Yong
dc.date.accessioned2015-12-10T23:09:40Z
dc.date.issued2012
dc.date.updated2016-02-24T09:39:10Z
dc.description.abstractTaper-free and vertically oriented Ge nanowires were grown on Si (111) substrates by chemical vapor deposition with Au nanoparticle catalysts. To achieve vertical nanowire growth on the highly lattice mismatched Si substrate, a thin Ge buffer layer was first deposited, and to achieve taper-free nanowire growth, a two-temperature process was employed. The two-temperature process consisted of a brief initial base growth step at high temperature followed by prolonged growth at lower temperature. Taper-free and defect-free Ge nanowires grew successfully even at 270 °C, which is 90 °C lower than the bulk eutectic temperature. The yield of vertical and taper-free nanowires is over 90%, comparable to that of vertical but tapered nanowires grown by the conventional one-temperature process. This method is of practical importance and can be reliably used to develop novel nanowire-based devices on relatively cheap Si substrates. Additionally, we observed that the activation energy of Ge nanowire growth by the two-temperature process is dependent on Au nanoparticle size. The low activation energy (∼5 kcal/mol) for 30 and 50 nm diameter Au nanoparticles suggests that the decomposition of gaseous species on the catalytic Au surface is a rate-limiting step. A higher activation energy (∼14 kcal/mol) was determined for 100 nm diameter Au nanoparticles which suggests that larger Au nanoparticles are partially solidified and that growth kinetics become the rate-limiting step.
dc.identifier.issn1528-7483
dc.identifier.urihttp://hdl.handle.net/1885/63405
dc.publisherAmerican Chemical Society
dc.sourceCrystal Growth & Design
dc.subjectKeywords: Au nanoparticle; Au surfaces; Defect-free; Eutectic temperature; Gaseous species; Growth steps; High temperature; Lattice-mismatched; Low-activation energy; Nanowire growth; Practical importance; Rate-limiting steps; Si substrates; Si(111) substrate; Two-
dc.titleTaper-free and Vertically Oriented Ge Nanowires on Ge/Si Substrates Grown by a Two-Temperature Process
dc.typeJournal article
local.bibliographicCitation.issue1
local.bibliographicCitation.lastpage141
local.bibliographicCitation.startpage135
local.contributor.affiliationKim, Jung Hyuk , Dong-A University
local.contributor.affiliationMoon, So Ra, Dong-A University
local.contributor.affiliationYoon, Hyun Sik, Dong-A University
local.contributor.affiliationJung, Jae Hun, Dong-A University
local.contributor.affiliationKim, Yong, Dong-A University
local.contributor.affiliationChen, Zhi Gang, University of Queensland
local.contributor.affiliationZou, Jin, University of Queensland
local.contributor.affiliationChoi, Duk-Yong, College of Physical and Mathematical Sciences, ANU
local.contributor.affiliationJoyce, Hannah J, University of Oxford
local.contributor.affiliationGao, Qiang, College of Physical and Mathematical Sciences, ANU
local.contributor.affiliationTan, Hoe Hark, College of Physical and Mathematical Sciences, ANU
local.contributor.affiliationJagadish, Chennupati, College of Physical and Mathematical Sciences, ANU
local.contributor.authoruidChoi, Duk-Yong, u4219275
local.contributor.authoruidGao, Qiang, u4006742
local.contributor.authoruidTan, Hoe Hark, u9302338
local.contributor.authoruidJagadish, Chennupati, u9212349
local.description.embargo2037-12-31
local.description.notesImported from ARIES
local.identifier.absfor100706 - Nanofabrication, Growth and Self Assembly
local.identifier.absfor091204 - Elemental Semiconductors
local.identifier.absseo970102 - Expanding Knowledge in the Physical Sciences
local.identifier.ariespublicationf5625xPUB802
local.identifier.citationvolume12
local.identifier.doi10.1021/cg2008914
local.identifier.scopusID2-s2.0-84855365284
local.identifier.thomsonID000298726300022
local.type.statusPublished Version

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