Cache Oblivious Matrix Transposition: Simulation and Experiment
Date
2004
Authors
Tsifakis, Dimitrios
Rendell, Alistair
Strazdins, Peter
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Publisher
Institute of Electrical and Electronics Engineers (IEEE Inc)
Abstract
A cache oblivious matrix transposition algorithm is implemented and analyzed using simulation and hardware performance counters. Contrary to its name, the cache oblivious matrix transposition algorithm is found to exhibit a complex cache behavior with a cache miss ratio that is strongly dependent on the associativity of the cache. In some circumstances the cache behavior is found to be worst than that of a naïve transposition algorithm. While the total size is an important factor in determining cache usage efficiency, the sub-block size, associativity, and cache line replacement policy are also shown to be very important.
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Source
The Ninth International Conference on Communications Systems, 2004. ICCS 2004
Type
Conference paper