Junctionless Silicon Nanowire Transistors without the Use of Impurity Doping

Abstract

With the shrinking dimensions of semiconductor structures reaching the nanoscale, conventional impurity doping techniques face several challenges due to their statistical nature, temperature dependence, and degradation in efficiency of the doping method. In addition, the cryogenic operation of highly doped transistors is complicated due to carrier freeze-out, which significantly reduces the availability of mobile charges, degrading device performance and inducing noise. Here, an innovative material solution is presented that enables silicon nanowire junctionless transistors without requiring impurity doping within the active semiconductor region. To this end, a SiO2 dielectric shell with deliberate defect engineering surrounding both the channel and the contact regions - known as direct modulation dopingis used to modify the nanoscale transport properties of the silicon. The obtained active carrier densities in the experiment are comparable to highly impurity-doped devices in the range of ~10^18 cm 3 and remain stable over a broad temperature range from 400 K down to 77 K. The primary advantage of removing dopants from the channel is evident in the enhanced field-effect mobilities, which increase from 115 to 331 cm2V−1s−1 as temperature decreases. The fabricated nanowire transistors in this work provide a high on/off ratio of ≥10^6, and a stable on-state performance down to 77 K. Hybrid-density-functional-theory calculations are carried out to show that there are no fundamental roadblocks to employing the method to devices with ultrascaled dimensions. The device architecture is positioned for applications in energy-efficient cryo-electronics and quantum technologies by addressing the limitations associated with conventional impurity doping. Show more