Implementation and optimization of the OpenMP accelerator model for the TI Keystone II architecture
The TI Keystone II architecture provides a unique combination of ARM Cortex-A15 processors with high performance TI C66x floating-point DSPs on a single low-power System-on-chip (SoC). Commercially available systems such as the HP Proliant m800 and nCore
|Collections||ANU Research Publications|
|Source:||LNCS 8766 - Using and Improving OpenMP for Devices, Tasks, and More|
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