VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters
| dc.contributor.author | Zhu, Junkang | |
| dc.contributor.author | Tang, Wei | |
| dc.contributor.author | Lee, Ching-En | |
| dc.contributor.author | Ye, Haolei | |
| dc.contributor.author | McCreath, Eric | |
| dc.contributor.author | Zhang, Zhengya | |
| dc.coverage.spatial | Kyoto, Japan | |
| dc.date.accessioned | 2024-01-29T04:41:34Z | |
| dc.date.created | 13-19 June 2021 | |
| dc.date.issued | 2021 | |
| dc.date.updated | 2022-10-02T07:18:34Z | |
| dc.description.abstract | VOTA is a domain-specific accelerator for correlation filter (CF)-based visual object tracking (VOT). It encompasses a Winograd convolution core, a FFT core and a vector core in a high-bandwidth starring topology. VOTA's frame-based instructions and execution enable a 537GFLOPS performance and reduce the code size. An instruction-chaining mechanism permits inter-core pipelining to improve the utilization to 84.2%. A 10.2mm2 28nm FP16 VOTA prototype incorporating a RISC-V host CPU is measured to achieve 2.45TFLOPS/W at 0.72V. Running OPCF, a CF-based VOT enhanced by adaptive boosting and particle filters, the chip achieves 1157FPS on 640×480 input frames at 0.9V and 175MHz, consuming 296mW. | en_AU |
| dc.description.sponsorship | The authors would like to thank Ford-UM Research Alliance for funding this work and the TSMC University Shuttle Program for chip fabrication support. | en_AU |
| dc.format.mimetype | application/pdf | en_AU |
| dc.identifier.isbn | 978-4-86348-780-2 | en_AU |
| dc.identifier.uri | http://hdl.handle.net/1885/312083 | |
| dc.language.iso | en_AU | en_AU |
| dc.publisher | IEEE | en_AU |
| dc.relation.ispartofseries | 2021 Symposia on VLSI Technology and Circuits | en_AU |
| dc.rights | © 2021 IEEE | en_AU |
| dc.source | 2021 Symposium on VLSI Circuits | en_AU |
| dc.title | VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters | en_AU |
| dc.type | Conference paper | en_AU |
| local.bibliographicCitation.lastpage | 2 | en_AU |
| local.bibliographicCitation.startpage | 1 | en_AU |
| local.contributor.affiliation | Zhu, Junkang, University of Michigan | en_AU |
| local.contributor.affiliation | Tang, Wei, University of Michigan | en_AU |
| local.contributor.affiliation | Lee, Ching-En, University of Michigan | en_AU |
| local.contributor.affiliation | Ye, Haolei, College of Engineering and Computer Science, ANU | en_AU |
| local.contributor.affiliation | McCreath, Eric, College of Engineering and Computer Science, ANU | en_AU |
| local.contributor.affiliation | Zhang, Zhengya, University of Michigan | en_AU |
| local.contributor.authoruid | Ye, Haolei, u5870415 | en_AU |
| local.contributor.authoruid | McCreath, Eric, u4033585 | en_AU |
| local.description.embargo | 2099-12-31 | |
| local.description.notes | Imported from ARIES | en_AU |
| local.description.refereed | Yes | |
| local.identifier.absfor | 460607 - High performance computing | en_AU |
| local.identifier.ariespublication | a383154xPUB21754 | en_AU |
| local.identifier.doi | 10.23919/VLSICircuits52068.2021.9492379 | en_AU |
| local.identifier.scopusID | 2-s2.0-85111796678 | |
| local.publisher.url | https://www.ieee.org/ | en_AU |
| local.type.status | Published Version | en_AU |
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