Room temperature writing of electrically conductive and insulating zones in silicon by nanoindentation

dc.contributor.authorRuffell, S.
dc.contributor.authorSears, K.
dc.contributor.authorBradby, J. E.
dc.contributor.authorWilliams, J. S.
dc.date.accessioned2015-12-01T05:42:36Z
dc.date.available2015-12-01T05:42:36Z
dc.date.issued2011-02-02
dc.date.updated2016-02-24T10:47:28Z
dc.description.abstractConventional silicon devices are fabricated in the diamond cubic phase of silicon, so-called Si-I. Other phases of silicon such as Si-XII and Si-III can be formed under pressure applied by nanoindentation and these phases are metastable at room temperature and pressure. We demonstrate in this letter that such phases exhibit different electrical properties to normal (diamond cubic) silicon and exploit this to perform maskless, room temperature, electrical patterning of silicon by writing both conductive and insulating zones directly into silicon substrates by nanoindentation. Such processing opens up a number of potentially new applications without the need for high temperature processing steps.
dc.description.sponsorshipThe authors gratefully acknowledge financial support from the Australian Research Council Grant No. DP0879940.en_AU
dc.identifier.issn0003-6951en_AU
dc.identifier.urihttp://hdl.handle.net/1885/16943
dc.publisherAmerican Institute of Physics (AIP)
dc.relationhttp://purl.org/au-research/grants/arc/DP0879940
dc.rightshttp://www.sherpa.ac.uk/romeo/issn/0003-6951..."Publishers version/PDF may be used on author's personal website, institutional website or institutional repository" from SHERPA/RoMEO site (as at 1/12/15). Copyright 2011 American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics. The following article appeared in Applied Physics Letters and may be found at https://doi.org/10.1063/1.3549191
dc.sourceApplied Physics Letters
dc.subjectKeywords: Diamond cubic phase; Electrical property; Electrically conductive; High-temperature processing; Mask less; New applications; Room temperature; Silicon devices; Silicon substrates; Electric properties; High temperature applications; Metastable phases; Nano
dc.titleRoom temperature writing of electrically conductive and insulating zones in silicon by nanoindentation
dc.typeJournal article
local.bibliographicCitation.issue5en_AU
local.bibliographicCitation.startpage052105en_AU
local.contributor.affiliationRuffell, Simon, College of Physical and Mathematical Sciences, CPMS Research School of Physics and Engineering, Department of Electronic Materials Engineering, The Australian National Universityen_AU
local.contributor.affiliationStewart Sears, Kalista, College of Physical and Mathematical Sciences, CPMS Research School of Physics and Engineering, Department of Electronic Materials Engineering, The Australian National Universityen_AU
local.contributor.affiliationBradby, Jodie, College of Physical and Mathematical Sciences, CPMS Research School of Physics and Engineering, Department of Electronic Materials Engineering, The Australian National Universityen_AU
local.contributor.affiliationWilliams, James, College of Physical and Mathematical Sciences, CPMS Research School of Physics and Engineering, Department of Electronic Materials Engineering, The Australian National Universityen_AU
local.contributor.authoremailsimon.ruffell@anu.edu.auen_AU
local.contributor.authoruidu4241699en_AU
local.description.notesImported from ARIESen_AU
local.identifier.absfor020404en_AU
local.identifier.absfor090604en_AU
local.identifier.absfor020406en_AU
local.identifier.ariespublicationu4241699xPUB6en_AU
local.identifier.citationvolume98en_AU
local.identifier.doi10.1063/1.3549191en_AU
local.identifier.scopusID2-s2.0-79951501530
local.identifier.thomsonID000286988400033
local.identifier.uidSubmittedByu3488905en_AU
local.publisher.urlhttps://www.aip.org/en_AU
local.type.statusPublished Versionen_AU

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