Labelled tree sequents, Tree hypersequents and Nested (Deep) Sequents

dc.contributor.authorGore, Rajeev
dc.contributor.authorRamanayake, Revantha
dc.coverage.spatialCopenhagen Denmark
dc.date.accessioned2015-12-10T23:16:18Z
dc.date.createdAugust 22-25 2012
dc.date.issued2012
dc.date.updated2015-12-10T09:51:34Z
dc.description.abstractWe identify a subclass of labelled sequents called "labelled tree sequents" and show that these are notational variants of tree-hypersequents in the sense that a sequent of one type can be represented naturally as a sequent of the other type. This relationship can be extended to nested (deep) sequents using the relationship between tree-hypersequents and nested (deep) sequents, which we also show. We apply this result to transfer proof-theoretic results such as syntactic cut-admissibility between the tree-hypersequent calculus CSGL and the labelled sequent calculus G3GL for provability logic GL. This answers in full a question posed by Poggiolesi about the exact relationship between these calculi. Our results pave the way to obtain cut-free tree-hypersequent and nested (deep) sequent calculi for large classes of logics using the known calculi for labelled sequents, and also to obtain a large class of labelled sequent calculi for bi-intuitionistic tense logics from the known nested (deep) sequent calculi for these logics. Importing proof-theoretic results between notational variant systems in this manner alleviates the need for independent proofs in each system. Identifying which labelled systems can be rewritten as labelled tree sequent systems may provide a method for determining the expressive limits of the nested sequent formalism.
dc.identifier.urihttp://hdl.handle.net/1885/65000
dc.publisherCollege Publications
dc.relation.ispartofseriesAdvances in Modal Logic (AiML 2012)
dc.sourceProceedings of the Advances in Modal Logic Conference (AiML 2012)
dc.source.urihttp://hylocore.ruc.dk/aiml2012/accepted.php
dc.titleLabelled tree sequents, Tree hypersequents and Nested (Deep) Sequents
dc.typeConference paper
local.bibliographicCitation.lastpage299
local.bibliographicCitation.startpage279
local.contributor.affiliationGore, Rajeev, College of Engineering and Computer Science, ANU
local.contributor.affiliationRamanayake, Revantha, Ecole Polytechnique
local.contributor.authoruidGore, Rajeev, u9409448
local.description.embargo2037-12-31
local.description.notesImported from ARIES
local.description.refereedYes
local.identifier.absfor080203 - Computational Logic and Formal Languages
local.identifier.absseo970108 - Expanding Knowledge in the Information and Computing Sciences
local.identifier.ariespublicationu4334215xPUB1034
local.identifier.scopusID2-s2.0-84906728299
local.type.statusPublished Version

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