Micro-benchmarks for Cluster OpenMP Implementations: Memory Consistency Costs

dc.contributor.authorWong, H'sien
dc.contributor.authorCai, Jie
dc.contributor.authorRendell, Alistair
dc.contributor.authorStrazdins, Peter
dc.date.accessioned2015-12-10T21:55:56Z
dc.date.issued2008
dc.date.updated2016-02-24T10:17:08Z
dc.description.abstractThe OpenMP memory model allows for a temporary view of shared memory that only needs to be made consistent when barrier or flush directives, including those that are implicit, are encountered. While this relaxed memory consistency model is key to developing cluster OpenMP implementations, it means that the memory performance of any given implementation is greatly affected by which memory is used, when it is used, and by which threads. In this work we propose a micro-benchmark that can be used to measure memory consistency costs and present results for its application to two contrasting cluster OpenMP implementations, as well as comparing these results with data obtained from a hardware supported OpenMP environment.
dc.identifier.isbn9783540795605
dc.identifier.urihttp://hdl.handle.net/1885/39193
dc.publisherSpringer
dc.relation.ispartofOpenMP in a New Era of Parallelism: 4th International Workshop, IWOMP 2008 West Lafayette USA, May 12-14 2008 Proceedings
dc.relation.isversionof1st Edition
dc.subjectKeywords: Memory consistency; Memory consistency models; Memory models; Memory performance; Micro-benchmark; Shared memories; Benchmarking
dc.titleMicro-benchmarks for Cluster OpenMP Implementations: Memory Consistency Costs
dc.typeBook chapter
local.bibliographicCitation.lastpage70
local.bibliographicCitation.placeofpublicationNew York
local.bibliographicCitation.startpage60
local.contributor.affiliationWong, H'sien, College of Engineering and Computer Science, ANU
local.contributor.affiliationCai, Jie, College of Engineering and Computer Science, ANU
local.contributor.affiliationRendell, Alistair, College of Engineering and Computer Science, ANU
local.contributor.affiliationStrazdins, Peter, College of Engineering and Computer Science, ANU
local.contributor.authoremailu9507815@anu.edu.au
local.contributor.authoruidWong, H'sien, u3321837
local.contributor.authoruidCai, Jie, u4393791
local.contributor.authoruidRendell, Alistair, u9507815
local.contributor.authoruidStrazdins, Peter, u8914893
local.description.embargo2037-12-31
local.description.notesImported from ARIES
local.identifier.absfor080501 - Distributed and Grid Systems
local.identifier.absfor100604 - Memory Structures
local.identifier.ariespublicationU3594520xPUB173
local.identifier.doi10.1007/978-3-540-79561-2-6
local.identifier.scopusID2-s2.0-55849144150
local.identifier.uidSubmittedByU3594520
local.type.statusPublished Version

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