Micro-benchmarks for Cluster OpenMP Implementations: Memory Consistency Costs
dc.contributor.author | Wong, H'sien | |
dc.contributor.author | Cai, Jie | |
dc.contributor.author | Rendell, Alistair | |
dc.contributor.author | Strazdins, Peter | |
dc.date.accessioned | 2015-12-10T21:55:56Z | |
dc.date.issued | 2008 | |
dc.date.updated | 2016-02-24T10:17:08Z | |
dc.description.abstract | The OpenMP memory model allows for a temporary view of shared memory that only needs to be made consistent when barrier or flush directives, including those that are implicit, are encountered. While this relaxed memory consistency model is key to developing cluster OpenMP implementations, it means that the memory performance of any given implementation is greatly affected by which memory is used, when it is used, and by which threads. In this work we propose a micro-benchmark that can be used to measure memory consistency costs and present results for its application to two contrasting cluster OpenMP implementations, as well as comparing these results with data obtained from a hardware supported OpenMP environment. | |
dc.identifier.isbn | 9783540795605 | |
dc.identifier.uri | http://hdl.handle.net/1885/39193 | |
dc.publisher | Springer | |
dc.relation.ispartof | OpenMP in a New Era of Parallelism: 4th International Workshop, IWOMP 2008 West Lafayette USA, May 12-14 2008 Proceedings | |
dc.relation.isversionof | 1st Edition | |
dc.subject | Keywords: Memory consistency; Memory consistency models; Memory models; Memory performance; Micro-benchmark; Shared memories; Benchmarking | |
dc.title | Micro-benchmarks for Cluster OpenMP Implementations: Memory Consistency Costs | |
dc.type | Book chapter | |
local.bibliographicCitation.lastpage | 70 | |
local.bibliographicCitation.placeofpublication | New York | |
local.bibliographicCitation.startpage | 60 | |
local.contributor.affiliation | Wong, H'sien, College of Engineering and Computer Science, ANU | |
local.contributor.affiliation | Cai, Jie, College of Engineering and Computer Science, ANU | |
local.contributor.affiliation | Rendell, Alistair, College of Engineering and Computer Science, ANU | |
local.contributor.affiliation | Strazdins, Peter, College of Engineering and Computer Science, ANU | |
local.contributor.authoremail | u9507815@anu.edu.au | |
local.contributor.authoruid | Wong, H'sien, u3321837 | |
local.contributor.authoruid | Cai, Jie, u4393791 | |
local.contributor.authoruid | Rendell, Alistair, u9507815 | |
local.contributor.authoruid | Strazdins, Peter, u8914893 | |
local.description.embargo | 2037-12-31 | |
local.description.notes | Imported from ARIES | |
local.identifier.absfor | 080501 - Distributed and Grid Systems | |
local.identifier.absfor | 100604 - Memory Structures | |
local.identifier.ariespublication | U3594520xPUB173 | |
local.identifier.doi | 10.1007/978-3-540-79561-2-6 | |
local.identifier.scopusID | 2-s2.0-55849144150 | |
local.identifier.uidSubmittedBy | U3594520 | |
local.type.status | Published Version |