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OpenMP on the Low-Power TI Keystone II ARM/DSP System-on-Chip

Stotzer, Eric; Jayaraj, Ajay; Ali, Murtaza; Friedmann, Arnon; Mitra, Gaurav; Rendell, Alistair; Lintault, Ian


The Texas Instrument (TI) Keystone II architecture integrates an octa-core C66X DSP with a quad-core ARM Cortex A15 MPCore processor in a non-cache coherent shared memory environment. This System-on-a-Chip (SoC) offers very high Floating Point Operations

CollectionsANU Research Publications
Date published: 2013
Type: Journal article
Source: Lecture Notes in Computer Science (LNCS)
DOI: 10.1007/978-3-642-40698-0_9
Access Rights: Open Access


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