Skip navigation
Skip navigation

WADE: Writeback-Aware Dynamic CachE management for NVM-based main memory system

Wang, Zhe; Shan, Shuchang; Cao, Ting; Gu, Junli; Xu, Yi; Mu, Shuai; Xie, Yuan; Jimenez, Daniel A


Emerging Non-Volatile Memory (NVM) technologies are explored as potential alternatives to traditional SRAM/DRAM-based memory architecture in future microprocessor design. One of the major disadvantages for NVM is the latency and energy overhead associated

CollectionsANU Research Publications
Date published: 2013
Type: Journal article
Source: ACM Transactions on Architecture and Code Optimization
DOI: 10.1145/2555289.2555307


File Description SizeFormat Image
01_Wang_WADE:_Writeback-Aware_Dynamic_2013.pdf2.56 MBAdobe PDF    Request a copy

Items in Open Research are protected by copyright, with all rights reserved, unless otherwise indicated.

Updated:  19 May 2020/ Responsible Officer:  University Librarian/ Page Contact:  Library Systems & Web Coordinator