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Parallel binary reflected gray code sequence generation on multicore architectures

Ali, Muhammad; Rumi, Shakila Khan

Description

We propose a novel parallel algorithm for generating all the sequences of binary reflected Gray code for a given number of bits as input, targeting machines with multicore architectures. A theoretical analysis of work and span, as well as parallelism of this algorithm, is carried out following a multithreaded implementation using Cilk++ on a multicore machine. Theoretical analysis of this algorithm shows a parallelism of Θ(2n/log n) and achieves a linear speedup on 12 cores for input data of...[Show more]

CollectionsANU Research Publications
Date published: 2014
Type: Journal article
URI: http://hdl.handle.net/1885/63036
Source: International Journal of Parallel, Emergent and Distributed Systems
DOI: 10.1080/17445760.2013.822498

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