Skip navigation
Skip navigation

Efficient Cycle-Accurate Simulation of the UltraSPARC III CPU

Strazdins, Peter; Clarke, William; Over, Andrew

Description

This paper presents a novel technique for cycleaccurate simulation of the Central Processing Unit (CPU) of a modern superscalar processor, the Ultra-SPARC III Cu processor. The technique is based on adding a module to an existing fetch-decode-execute style of CPU simulator, rather than the traditional method of fully modelling the CPU microarchitecture. It is also suitable for accurate SMP modelling. The main functions of the module are the simulation of instruction grouping, register...[Show more]

CollectionsANU Research Publications
Date published: 2007
Type: Conference paper
URI: http://hdl.handle.net/1885/38211
Source: Conferences in Research and Practice in Information Technology (CRPIT), Volume 62

Download

File Description SizeFormat Image
01_Strazdins_Efficient_Cycle-Accurate_2007.pdf132.83 kBAdobe PDF    Request a copy


Items in Open Research are protected by copyright, with all rights reserved, unless otherwise indicated.

Updated:  20 July 2017/ Responsible Officer:  University Librarian/ Page Contact:  Library Systems & Web Coordinator