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A Software Phase-Locked Loop from Theory to Practice: TMS320C60000 DSP Based Implementation and Analysis

dc.contributor.authorSithamparanathan, Kandeepan
dc.coverage.spatialSydney Australia
dc.date.accessioned2015-12-07T22:40:46Z
dc.date.createdMarch 13-16 2006
dc.identifier.urihttp://hdl.handle.net/1885/24017
dc.publisherUniversity of Sydney
dc.relation.ispartofseriesInternational Conference on Wireless Broadband and Ultra WidebandCommunications (AusWireless 2006)
dc.sourceAusWireless '06 Proceedings
dc.source.urihttp://ewh.ieee.org/r10/act/index.htm
dc.titleA Software Phase-Locked Loop from Theory to Practice: TMS320C60000 DSP Based Implementation and Analysis
dc.typeConference paper
local.description.notesImported from ARIES
local.description.refereedYes
dc.date.issued2006
local.identifier.absfor090609 - Signal Processing
local.identifier.ariespublicationu3594520xPUB30
local.type.statusPublished Version
local.contributor.affiliationSithamparanathan, Kandeepan, College of Engineering and Computer Science, ANU
local.description.embargo2037-12-31
dc.date.updated2015-12-07T10:54:14Z
CollectionsANU Research Publications

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