A Software Phase-Locked Loop from Theory to Practice: TMS320C60000 DSP Based Implementation and Analysis
dc.contributor.author | Sithamparanathan, Kandeepan | |
---|---|---|
dc.coverage.spatial | Sydney Australia | |
dc.date.accessioned | 2015-12-07T22:40:46Z | |
dc.date.created | March 13-16 2006 | |
dc.identifier.uri | http://hdl.handle.net/1885/24017 | |
dc.publisher | University of Sydney | |
dc.relation.ispartofseries | International Conference on Wireless Broadband and Ultra WidebandCommunications (AusWireless 2006) | |
dc.source | AusWireless '06 Proceedings | |
dc.source.uri | http://ewh.ieee.org/r10/act/index.htm | |
dc.title | A Software Phase-Locked Loop from Theory to Practice: TMS320C60000 DSP Based Implementation and Analysis | |
dc.type | Conference paper | |
local.description.notes | Imported from ARIES | |
local.description.refereed | Yes | |
dc.date.issued | 2006 | |
local.identifier.absfor | 090609 - Signal Processing | |
local.identifier.ariespublication | u3594520xPUB30 | |
local.type.status | Published Version | |
local.contributor.affiliation | Sithamparanathan, Kandeepan, College of Engineering and Computer Science, ANU | |
local.description.embargo | 2037-12-31 | |
dc.date.updated | 2015-12-07T10:54:14Z | |
Collections | ANU Research Publications |
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02_Sithamparanathan_A_Software_Phase-Locked_Loop_2006.pdf | 88.11 kB | Adobe PDF | Request a copy |
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