A Tapped Electronically Variable Delay Line Suitable for Integrated Circuits

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dc.contributor.authorAnderson, B. D.en
dc.contributor.authorBrady, D. M.en
dc.contributor.authorNew, W.en
dc.contributor.authorNewcomb, R.en
dc.date.accessioned2026-01-02T20:41:26Z
dc.date.available2026-01-02T20:41:26Z
dc.date.issued1966en
dc.description.statusPeer-revieweden
dc.format.extent2en
dc.identifier.issn0018-9219en
dc.identifier.otherORCID:/0000-0002-1493-4774/work/174739843en
dc.identifier.scopus84938448685en
dc.identifier.urihttps://hdl.handle.net/1885/733802973
dc.language.isoenen
dc.sourceProceedings of the IEEEen
dc.titleA Tapped Electronically Variable Delay Line Suitable for Integrated Circuitsen
dc.typeJournal articleen
dspace.entity.typePublicationen
local.bibliographicCitation.lastpage1119en
local.bibliographicCitation.startpage1118en
local.contributor.affiliationAnderson, B. D.; Stanford Universityen
local.contributor.affiliationBrady, D. M.; Stanford Universityen
local.contributor.affiliationNew, W.; Stanford Universityen
local.contributor.affiliationNewcomb, R.; Stanford Universityen
local.identifier.citationvolume54en
local.identifier.doi10.1109/PROC.1966.5042en
local.identifier.puree3553221-e2b8-458b-8169-4fbb829b3cf5en
local.identifier.urlhttps://www.scopus.com/pages/publications/84938448685en
local.type.statusPublisheden

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